Project Requests
Project Request · Engineering
Synopsys EDA
Vendor: Synopsys
Also known as Synopsys electronic design automation
No implementation is currently listed. This is a community wish, not software ready to install.
What people want recreated
Summary
Wanted: Synopsys chip-design workflows: HDL simulation and debugging, formal verification, synthesis, place and route.
Description
Reproduce Synopsys chip-design workflows: HDL simulation and debugging, formal verification, synthesis, place and route, timing and power analysis, analog/mixed-signal simulation and physical verification. Support design constraints, netlists, layout interchange and scripting. Could share engines and formats with Cadence EDA while offering familiar frontends.
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