Synopsys EDA
Engineering
Wanted: Synopsys chip-design workflows: HDL simulation and debugging, formal verification, synthesis, place and route.
View request →Original software by vendor
Software already in the Remade catalog, its listed reimplementations, and what people want built next.
Engineering
Wanted: Synopsys chip-design workflows: HDL simulation and debugging, formal verification, synthesis, place and route.
View request →